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Prof. Yu is promoted to the rank of full professor by Georgia Tech Board of Regents, see the news here:

https://www.ece.gatech.edu/news/2023/03/promotion-and-tenure-awarded-six-ece-faculty-members

Please check out Prof. Yu’s new textbook if you are interested in basics and emerging trends for SRAM, DRAM, NAND, and emerging memories.

S. Yu, Semiconductor Memory Devices and Circuits, Publisher: CRC Press/Taylor & Francis, 2022. [Link]

Accompanying video lectures are available at YouTube Link

This year we have 5 papers are accepted by IEEE Symposium on VLSI Technology and Circuits, one of the premier conferences in the microelectronics! We have two collaborative papers with Notre Dame and one collaborative paper with Purdue.

• G. Choe, P. V. Ravindran, A. Lu, J. Hur, M. Lederer, A. Reck, S. Lombardo, N. Afroze, J. Kacher, A. I. Khan, S. Yu, “Machine learning assisted statistical variation analysis of ferroelectric transistors: from experimental metrology to predictive modeling,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
• H. Jiang, W. Li, S. Huang, S. Yu, “A 40nm analog-input ADC-free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
• K. A. Aabrar, S. G. Kirtania, A. Lu, A. Khanna, W. Chakraborty, M. San Jose, S. Yu, S. Datta, “A thousand state superlattice(SL) FeFET analog weight cell,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
• A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. San Jose, W. Chakraborty, S. Yu, P. Fay, S. Datta, “BEOL compatible ferroelectric routers for run-time reconfigurable compute-in-memory accelerators,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
• X. Lyu, P. R. Shrestha, M. Si, P. Wang, J. Li, K. P. Cheung, S. Yu, P. D. Ye, “Determination of domain wall velocity and nucleation time by switching dynamics studies of ferroelectric Hafnium Zirconium oxide,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.

Prof. Yu has been named as a Distinguished Lecturer for the IEEE Electron Devices Society (EDS), with the following seminar available:

Landscape of Synaptic Weight Memories

see news article at https://www.ece.gatech.edu/news/651593/yu-appointed-ieee-eds-distinguished-lecturer

 

Our group has 2 papers accepted , and also has 4 collaborative papers with University of Notre Dame and Purdue University to be presented at IEDM 2021 in Dec. 2020. This keeps the same productivity in IEDM papers as last year, congratulations to all the authors! So far, Prof. Yu has authored or co-authored 40 IEDM papers since 2008.

• Y. Luo, S. Dutta, A. Kaul, S.-K. Lim, M. S. Bakir, S. Datta, S. Yu, “Monolithic 3D compute-in-memory accelerator with BEOL transistor based reconfigurable interconnect,” IEEE International Electron Devices Meeting (IEDM) 2021, invited.
• Y.-C. Luo, J. Hur, T.-H. Wang, A. Lu, S. Li, A. I. Khan, S. Yu, “Experimental demonstration of non-volatile capacitive crossbar array for in-memory computing,” IEEE International Electron Devices Meeting (IEDM) 2021.
• K. A. Aabrar, J. Gomez, S. G. Kirtania, M. San Jose, Y. Luo, P. G. Ravikumar, P. V. Ravindran, H. Ye, S. Banerjee, S. Dutta, A. I. Khan, S. Yu, S. Datta, “BEOL compatible superlattice FerroFET-based high precision analog weight cell with superior linearity and symmetry,” IEEE International Electron Devices Meeting (IEDM) 2021.
• Z. Lin, M. Si, Y.-C. Luo, X. Lyu, A. Charnas, Z. Chen, Z. Yu, W. Tsai, P. C. McIntyre, R. Kanjolia, M. Moinpour, S. Yu, P. D. Ye, “High-Performance BEOL-compatible atomic-layer-deposited In₂O₃ Fe-FETs enabled by channel length scaling down to 7 nm: Achieving performance enhancement with large memory window of 2.2 V, long retention > 10 years and high endurance > 10⁸ cycles,” IEEE International Electron Devices Meeting (IEDM) 2021.
• N. Tasneem, Z. Wang, Z. Zhao, N. Upadhyay, S. Lombardo, H. Chen, J. Hur, D. Triyoso, S. Consiglio, K. Tapily, R. Clark, G. Leusink, S. Kurinec, S. Datta, S. Yu, K. Ni, M. Passlack, W. Chern, A. I. Khan, “Trap capture and emission dynamics in ferroelectric field-effect transistors and their impact on device operation and reliability,” IEEE International Electron Devices Meeting (IEDM) 2021.
• Z. Wang, N. Tasneem, J. Hur, H. Chen, S. Yu, W. Chern, A. I. Khan, “Standby bias improvement of read after write delay in ferroelectric field effect transistors,” IEEE International Electron Devices Meeting (IEDM) 2021.