Prospective students and interns

All the positions in the lab have been filled for the Fall 2021. No current openings for PhD students or postdoc researchers.

BTW: We do not accept or host international visiting students or remote interns.

Due to the high volume of inquiry, I may not reply to your email if your background does not fit with our on-going research projects.


Prof. Yu is serving Distinguished Lecturer for IEEE CAS society 2021-2022

Prof. Yu is selected as the Distinguished Lecturer for IEEE Circuits and Systems (CAS) society for 2021-2022, with the following two seminars available:

  • Circuit Design and Silicon Prototypes for Compute-in-Memory for Deep Learning
    Inference Engine
  • NeuroSim: A Benchmark Framework of Compute-in-Memory Hardware
    Accelerators from Devices/Circuits to Architectures/Algorithms

IEEE Circuits and Systems (CAS) Distinguished Lecturer Program (DLP)



6 IEDM papers accepted

Our group has 3 papers accepted, and also has 3 collaborative papers with University of Notre Dame and Rochester Institute of Technology to be presented at IEDM 2020 virtual in Dec. 2020. This is a new record of IEDM papers of our group, congratulations to all the authors!

  1. X. Peng, W. Chakraborty, A. Kaul, M. S. Bakir, S. Datta, S. Yu, “Benchmarking monolithic 3D integration for compute-in-memory accelerators: overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
  2. P. Wang, X. Peng, W. Chakraborty, A. I. Khan, S. Datta, S. Yu, “Cryogenic benchmarks of embedded memory technologies for recurrent neural network based quantum error correction,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
  3. J. Hur, P. Wang, Z. Wang, G. Choe, N. Tasneem, A. I. Khan, S. Yu, “Interplay of switching characteristics, cycling endurance and multilevel retention of ferroelectric capacitor,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
  4. S. Dutta, H. Ye, W. Chakraborty, Y.-C. Luo, M. San Jose, B. Grisafe, A. Khanna, I. Lightcap, S. Shinde, S. Yu, S. Datta, “Monolithic 3D integration of high endurance multi-bit ferroelectric FET for accelerating compute-in-memory,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
  5. Z. Wang, M. M. Islam, P. Wang, S. Deng, S. Yu, A. I. Khan, K. Ni, “Depolarization field induced instability of polarization states in HfO2 based ferroelectric FET,” IEEE International Electron Devices Meeting (IEDM) 2020, virtual.
  6. A. Kaul, X. Peng, S. K. Raja, S. Yu, M. S. Bakir, “Thermal modeling of 3D polylithic integration and implications on BEOL RRAM performance, IEEE International Electron Devices Meeting (IEDM) 2020, virtual, invited.

Prof. Yu received DAC Under-40 Innovators Award

Prof. Yu received the ACM/IEEE Design Automation Conference (DAC) Under-40 Innovators Award in 2020 owing to his contribution to the pioneering research on benchmarking hardware accelerators for machine learning. See the news at


In the year of 2020, Prof. Shimeng Yu is invited for the following presentations at various conferences. Due to COVID-19, many of the presentations will be virtual, and please check this Youtube channel for recorded versions.

S. Huang, X. Sun, X. Peng, H. Jiang, S. Yu, “Overcoming challenges for achieving high in-situ training accuracy with emerging memories,” IEEE/ACM Design, Automation & Test in Europe (DATE) 2020, invited. [Online]

S. Yu, X. Sun, X. Peng, S. Huang, “Compute-in-memory with emerging nonvolatile-memories: challenges and prospects,” IEEE Custom Integrated Circuits Conference (CICC) 2020, invited. [Online]

S. Yu, P. Wang, “Ferroelectric devices for compute-in-memory: array-level operations” IEEE Device Research Conference (DRC) 2020, invited. [Online]

S. Yu, “Compute-in-memory prototype chips from SRAM to RRAM,” ACM/IEEE Design Automation Conference (DAC) 2020, invited. [Online]

S. Yu, “Compute-in-memory for AI: From inference to training”, VLSI-Design, Automation and Test (DAT) 2020, invited. [Online]

S. Yu, “Compute-in-Memory for Deep Learning Accelerator: Benchmark and Monolithic 3D Integration”, IEEE European Solid-State Circuits Research Conference (ESSCIRC) 2020, invited. [Online]

S. Yu, “Monolithic 3D Integration of AI Accelerators,” Keynote Speech, SiP Global Summit at SEMICON Taiwan 2020, invited. [Online]

S. Yu, “Ferroelectric Transistors for Synaptic Devices: Challenges and Prospects,” ECS Pacific Rim Meeting (PRiME) 2020, invited. [Online]

S. Yu, “Analog Memory Needs for AI”, IEEE International Electron Devices Meeting (IEDM) 2020, Short Course, invited. [Online]