6 IEDM paper accepted

Our group has 2 papers accepted , and also has 4 collaborative papers with University of Notre Dame and Purdue University to be presented at IEDM 2021 in Dec. 2020. This keeps the same productivity in IEDM papers as last year, congratulations to all the authors! So far, Prof. Yu has authored or co-authored 40 IEDM papers since 2008.

  • Y. Luo, S. Dutta, A. Kaul, S.-K. Lim, M. S. Bakir, S. Datta, S. Yu, “Monolithic 3D compute-in-memory accelerator with BEOL transistor based reconfigurable interconnect,” IEEE International Electron Devices Meeting (IEDM) 2021, invited.
  • Y.-C. Luo, J. Hur, T.-H. Wang, A. Lu, S. Li, A. I. Khan, S. Yu, “Experimental demonstration of non-volatile capacitive crossbar array for in-memory computing,” IEEE International Electron Devices Meeting (IEDM) 2021.
  • K. A. Aabrar, J. Gomez, S. G. Kirtania, M. San Jose, Y. Luo, P. G. Ravikumar, P. V. Ravindran, H. Ye, S. Banerjee, S. Dutta, A. I. Khan, S. Yu, S. Datta, “BEOL compatible superlattice FerroFET-based high precision analog weight cell with superior linearity and symmetry,” IEEE International Electron Devices Meeting (IEDM) 2021.
  • Z. Lin, M. Si, Y.-C. Luo, X. Lyu, A. Charnas, Z. Chen, Z. Yu, W. Tsai, P. C. McIntyre, R. Kanjolia, M. Moinpour, S. Yu, P. D. Ye, “High-Performance BEOL-compatible atomic-layer-deposited In2O3 Fe-FETs enabled by channel length scaling down to 7 nm: Achieving performance enhancement with large memory window of 2.2 V, long retention > 10 years and high endurance > 108 cycles,” IEEE International Electron Devices Meeting (IEDM) 2021.
  • N. Tasneem, Z. Wang, Z. Zhao, N. Upadhyay, S. Lombardo, H. Chen, J. Hur, D. Triyoso, S. Consiglio, K. Tapily, R. Clark, G. Leusink, S. Kurinec, S. Datta, S. Yu, K. Ni, M. Passlack, W. Chern, A. I. Khan, “Trap capture and emission dynamics in ferroelectric field-effect transistors and their impact on device operation and reliability,” IEEE International Electron Devices Meeting (IEDM) 2021.
  • Z. Wang, N. Tasneem, J. Hur, H. Chen, S. Yu, W. Chern, A. I. Khan, “Standby bias improvement of read after write delay in ferroelectric field effect transistors,” IEEE International Electron Devices Meeting (IEDM) 2021.


Prospective students and interns

All the positions in the lab have been filled for the Fall 2021. No current openings for PhD students. We may have 2 PhD student opening (on hardware security and 3D IC design) for Fall 2022 and a postdoc opening for Spring 2022 (on device fabrication).

BTW: We do not accept or host international visiting students or remote interns.

Due to the high volume of inquiry, I may not reply to your email if your background does not fit with our on-going research projects.


Prof. Yu is serving Distinguished Lecturer for IEEE CAS society 2021-2022

Prof. Yu is selected as the Distinguished Lecturer for IEEE Circuits and Systems (CAS) society for 2021-2022, with the following two seminars available:

  • Circuit Design and Silicon Prototypes for Compute-in-Memory for Deep Learning
    Inference Engine
  • NeuroSim: A Benchmark Framework of Compute-in-Memory Hardware
    Accelerators from Devices/Circuits to Architectures/Algorithms

IEEE Circuits and Systems (CAS) Distinguished Lecturer Program (DLP)



Prof. Yu received DAC Under-40 Innovators Award

Prof. Yu received the ACM/IEEE Design Automation Conference (DAC) Under-40 Innovators Award in 2020 owing to his contribution to the pioneering research on benchmarking hardware accelerators for machine learning. See the news at




In the year of 2020, Prof. Shimeng Yu is invited for the following presentations at various conferences. Due to COVID-19, many of the presentations will be virtual, and please check this Youtube channel for recorded versions.

S. Huang, X. Sun, X. Peng, H. Jiang, S. Yu, “Overcoming challenges for achieving high in-situ training accuracy with emerging memories,” IEEE/ACM Design, Automation & Test in Europe (DATE) 2020, invited. [Online]

S. Yu, X. Sun, X. Peng, S. Huang, “Compute-in-memory with emerging nonvolatile-memories: challenges and prospects,” IEEE Custom Integrated Circuits Conference (CICC) 2020, invited. [Online]

S. Yu, P. Wang, “Ferroelectric devices for compute-in-memory: array-level operations” IEEE Device Research Conference (DRC) 2020, invited. [Online]

S. Yu, “Compute-in-memory prototype chips from SRAM to RRAM,” ACM/IEEE Design Automation Conference (DAC) 2020, invited. [Online]

S. Yu, “Compute-in-memory for AI: From inference to training”, VLSI-Design, Automation and Test (DAT) 2020, invited. [Online]

S. Yu, “Compute-in-Memory for Deep Learning Accelerator: Benchmark and Monolithic 3D Integration”, IEEE European Solid-State Circuits Research Conference (ESSCIRC) 2020, invited. [Online]

S. Yu, “Monolithic 3D Integration of AI Accelerators,” Keynote Speech, SiP Global Summit at SEMICON Taiwan 2020, invited. [Online]

S. Yu, “Ferroelectric Transistors for Synaptic Devices: Challenges and Prospects,” ECS Pacific Rim Meeting (PRiME) 2020, invited. [Online]

S. Yu, “Analog Memory Needs for AI”, IEEE International Electron Devices Meeting (IEDM) 2020, Short Course, invited. [Online]