This year we have 5 papers are accepted by IEEE Symposium on VLSI Technology and Circuits, one of the premier conferences in the microelectronics! We have two collaborative papers with Notre Dame and one collaborative paper with Purdue.
- G. Choe, P. V. Ravindran, A. Lu, J. Hur, M. Lederer, A. Reck, S. Lombardo, N. Afroze, J. Kacher, A. I. Khan, S. Yu, “Machine learning assisted statistical variation analysis of ferroelectric transistors: from experimental metrology to predictive modeling,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
- H. Jiang, W. Li, S. Huang, S. Yu, “A 40nm analog-input ADC-free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
- K. A. Aabrar, S. G. Kirtania, A. Lu, A. Khanna, W. Chakraborty, M. San Jose, S. Yu, S. Datta, “A thousand state superlattice(SL) FeFET analog weight cell,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
- A. Khanna, H. Ye, Y. Luo, G. Bajpai, M. San Jose, W. Chakraborty, S. Yu, P. Fay, S. Datta, “BEOL compatible ferroelectric routers for run-time reconfigurable compute-in-memory accelerators,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.
- X. Lyu, P. R. Shrestha, M. Si, P. Wang, J. Li, K. P. Cheung, S. Yu, P. D. Ye, “Determination of domain wall velocity and nucleation time by switching dynamics studies of ferroelectric Hafnium Zirconium oxide,” IEEE Symposium on VLSI Technology and Circuits (VLSI) 2022, Hawaii, USA.